The EPCS device is mounted on a custom card that fits into a SD memory card holder mounted on the board. Thus, we can (hopefully) allow customers to update both hardware and software by replacing the one card in the field. The EPCS card makes no difference whether installed or not.
The SDRAM test consists of walking bit tests, byte (DQMn) tests, long int address test (with prime number addend), fill zero test, fill ff test.... all that I have ever used in the past and then some. I've tried playing with the PLL phase, but I can't make it fail. Clocking at half speed did not fail either, but did not help. I speculate that perhaps a longer reset delay (PLL stability?) might help.
I do not have this problem with the SDK board. Perhaps the boot loader expects something in the EPCS flash when downloading to SDRAM? The puzzle is why internal RAM succeeds while external SDRAM fails. Perhaps the Nios II IDE expects flash to accompany SDRAM. Is the source for the boot loader provided?