1) Yes like most of the stuff it is there in the docs but ... there must be a reason why we both didn't find it ....
I could think of the sopc editor mentioning to use these recommend syntax if it find signal named not that way ... just as a hint.
no it can't be used because, avalon description says clearly a read master MUST always enable all byteenable lines to read the full 32bit. and therefor all modules comming from altera will always read full 32bit. we have a custom modul that reads and writes only those bytes that are selected by the byteenable[3..0]
as long as we do not have a clever solution for this, tristate bridge for normal external devices is a different than the one for those external device that do not like those read cycles that come from the must always read 32bit.
9) yes the tristate bridge can handle them if you connect a propper sopc modul to the tri state bridge
11) hmmm .. open the ptf ... search for the settings ... and manually edit the custom design tools. i wish there was a file like system.h created by sopc generate and not by the ide as we do not use the ide. we use euros.
12) well here it works with gls_clk (no need to name the interface)
13) more to follow but it is late and i had 15hours today quartus and protel dxp searching for a bug somewhere on a avalon master but at the end only disabling the datacache solved it a(for now).... hopefully MySoppurt will be back from holiday as soon as possible and help me to solve my request about a definitly not writing avalon master that sets all signals properly (well it does write to external sram but not sdram)
14) yes one comes into my mind ... during sopc generation if some java errors are reported ... what is the reason for them ... only a error won't help a lot