Altera_ForumHonored Contributor14 years ago64bit ddr2 conflit with lan91c11 Hello in my design, I use a ddr2 high performance controller, DQ is 32bits, so local interface is 64 bit. and I also use a lan91c11. before generation, there is no any base address conflict. b...Show More
Altera_ForumHonored Contributor14 years agofind the cuase : should add a cross clock bridge between DDR2 and avalon bus. thanks.
Recent Discussionslicensing.altera.com never workedNiosV and juart-terminalNIOS V/m dbg_reset_out signal (Q25.1 Std, MAX10)JTAG_UART stuck in printfAshling IDE scripted project creation