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Honored Contributor
Honored Contributor.elf file explained?
Hello! I have just watched the ALTERA Embedded Design Flow video tutorial and at some point at the end it is explained how the user can program a flash memory with: - A boot loader - The...
Altera_ForumHonored Contributor
Honored ContributorIf you instanciate the EPCS boot code the pins are automatically assigned to a SPI hardware block assiciated with the EPCS boot code.
It is all a PITA. The EPCS SPI block is only available attached to the boot code (I think this is so that the boot code can access it at a known offset from the program counter). So it you want to use the EPCS SPI interface (but not boot from it) you have to waste the memory block. I also did some quick ball-park calculations and think that a 100MHz nios cpu could directly bit-bang the EPCS memory almost as fast as it can be driven by the SPI block. Since the most likely reason for such accesses are writes, the speed of the transfers won't be the limiting factor. Even a factor of 2 or 4 slowdown in a read-verify wouldn't really matter. The direct bit-bang code would also be a lot smaller than the existing nested morass of code of the HAL EPCS functions.
