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Altera_Forum
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13 years ago

What is the polarity of DCLK signal in EPCS16 ?

I am using cyclone iii ep3c25 fpga in which I have designed an sopc system which has altera spi ip. I want to access EPCS16 flash using this SPI. For that, what polarity should i kept for the sclk si...
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Altera_Forum
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13 years ago

If you take a look at the timing diagrams in the datasheet you will see that EPCS devices set the DATA output on DCLK falling edge and latch ASDI input on DCLK rising edge.