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sbala31's avatar
sbala31
Icon for New Contributor rankNew Contributor
6 years ago

what is the option to initiate the DDR3L calibration? how long it will take to complete the calibration?

we are trying to simulate(functional) ddr3l controller ip with micron memory model. After reset release, we are able to see PLL lock and memory reset release. we are expecting calibration/initializat...
BoonT_Intel's avatar
BoonT_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

The IP is not officially support simulation using third party memory model. Have you try run the simulation using the generate example design? The example design is included the generic memory model which validate working with the ddr3l IP.

The intention to ask you try with the example design is to figure out the issue is caused by the simulator or not. I found that using some simulator that incompatible with IP or quartus version, the simulation will stuck after reset release.

sbala31's avatar
sbala31
Icon for New Contributor rankNew Contributor
6 years ago

we could not find any memory model in example design. can u specify the path for the memory model in example design?