Mahdi
Occasional Contributor
Occasional ContributorWhat happens if a signal value changes during the wait_request assertion?
Hello,
I have a question regarding the waitrequest signal in Avalon Memory-Mapped Interface.
In Avalon® Interface Specifications document, page 16, it is mentioned: "When waitrequest is asserted,...
As long as all your writes completed successfully, that should be OK. Is it a BFM in your simulation saying there is an error?
The interconnect may, at that point, be asserting waitrequest for something else happening in the system. Your host doesn't care anymore because it's done with its transfers.
