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Altera_Forum
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12 years ago

VIP fmax for Cyclone IV device

Hi, I have a question about the VIP fmax for CycloneIV FPGA. The chapter 1 in VIP user guide has a fmax table with regard to each IP. For example, the clocked video input IP has a fmax o...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I've been recompiling some Cyclone 4 designs to Cyclone 5 to use with the Helio View (SoC) kit. Other than the deinterlacer, I didn't have any problems using any of the components at 1080p60 rates, although I had to move to the fastest speed grade (I have a pretty complex system). Noticed improvements with the latest Quartus version, and deinterlacer did much better when I de-selected some of the options. Arria V is faster.