Forum Discussion
Altera_Forum
Honored Contributor
18 years agoHello Wilhelm.
gate level simulation should be used, if the synthesis result is in doubt or device timing is the object of tests. But the Altera supplied functional simulation model should produce corect results as well. As reported, I experienced no irregularities with FFT v.2.2.0 model. Don't know if the difference is related to V2.2.1 model, the testbench or ModelSim version. Anyway, the real design behaviour counts. Best regards, Frank