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BMart12's avatar
BMart12
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Using Video IP with time limited sof II

community.intel.com/t5/FPGA-Intellectual-Property/Using-Video-IP-with-time-limited-sof/m-p/1285319#M24002 Hello, I was instructed by AabdRhman_A_Int el to resubmit my inquiry regarding the tim...
AR_A_Intel's avatar
AR_A_Intel
Icon for Super Contributor rankSuper Contributor
4 years ago

Hi Ben Martinez

Welcome to INTEL forum. I’ll be taking this case and help you on the diagnosis of Video IP with time limited sof. But first, may I know, did you modify the design or just recompile the same design with different license type (temp license vs evaluation mode license)


BMart12's avatar
BMart12
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Hi AR_A,

Thank you for your quick response. I did not use the identical Quartus project for both. The design evolved from when I generated the RBF. However, I can generate the time limited SOF from the project that produced the working RBF. Please let me know if you need me to do that.

I am guessing the time limited SOF is generated by the evaluation mode license which is what I get when building the project with my standard license. So, does changing the design affect the capability of the evaluation mode time limited SOF?

Thanks,

Ben Martinez