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Altera_Forum's avatar
Altera_Forum
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15 years ago

Using UniPHY leaving RUP and RDN unconnected for a DDR2 SDRAM controller

is there a way to implement a UniPHY DDR2 SDRAM controller leaving RUP and RDN pins unconnected i.e. without OCT?
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Thanks for all the hints. Had the same problem with OCT.

Erasing the .qsc entries which I made manually using the Assignment Editor and rerunning the whole compilation did the job.

Obviously the UniPhy IP core generates the OCT settings itself an thereby a concurring ressource utilization was created.

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