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CosmoKramer's avatar
CosmoKramer
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

user issued emif refresh and read/write commands

We are using EMIF IP for Agilex FPGA in our design. Rather than using automatic refreshes, we use user controlled refreshes through mmr interface. Please can you help me figure out if read/write c...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi Sandy,


The read/write commands will be interrupted when performing user refresh.


Regards,

Adzim


  • CosmoKramer's avatar
    CosmoKramer
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Is there a way to prioritize read/write commands over user refresh?

    I would like to simulate this using example design but current example design does not have user control refresh logic.

    do you have any other example design which can help me understand user refresh and read/write command interaction?