Forum Discussion
Peter01
New Contributor
2 years agoUse case of SLD hub controller
I want to use SLD hub in MAX-V FPGA. The sink of SLD hub would be SLD node in the FPGA fabric. How about the source of SLD hub ? , what is it's input ? (channel and protocol).
FvM
Super Contributor
2 years agoHi,
sld_hub_controller is used as lower level interface in sld_hub_controller_system and jtag-over-protocol IP, which are the hardware interfaces of documented remote debug solutions, see AN693 and AN971. The interfaces and protocols are not documented as such.
altera_streaming_sld_hub_controller_core.sv source has however meaningful comments, variable and state names, it's not too difficult to understand the intended usage. A testbench can help to figure out control timing.
MAX V has limited debugging capabilities due to low LE count, which debugging functions are you looking for?