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h3l1um
Occasional Contributor
Occasional ContributorUnable to generate AXI Streaming Intel FPGA IP for PCIe Example design for F-Tile FPGA Agilex 7 R24C
Hello Team, I am trying to generate an example design for the AXI Streaming Intel FPGA IP for PCI Express IP. It supports F-Tile PCIe in the design, but when trying to generate the Example design a...
In Q24.1 the design example generation is only for P-Tile and R-Tile.
You can simply instantiate one IP in your project or copy that IP from your previous project.
Regards,
Rong
RongY_altera
Contributor
ContributorIn Quartus tool download website, you can find a SHA1 checksum like below screenshot. In linux, you can use command shasum to check if your download file is broken or not. Incomplete tool may cause some unexpected issues while using.
Regards,
Rong
