Forum Discussion

MamaSaru's avatar
MamaSaru
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

TX sync header error insertion in Arria 10 GX

Hi, I have a problem regarding Tx error insertion function on Arria 10 GX 10GBASE-R with FEC. I have built two duplex 10GBASE-R with FEC PHYs on my board, connecting Tx to Rx through DAC cable. Pa...
Ethernet
ZiYing_Intel's avatar
ZiYing_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi MamaSaru,


Sorry to tell you that we can't simply do modification on your design since we do not know your design requirement.


But according to your feedback, I have tell your request to development team for the enhancement design purpose. For the purpose of to drive exposed signal like tx_err_ins for error insertion without using individual register modification. This makes this function usable and match with current explanation on the user guide (two condition needed for insertion).


Best regards,

zying