Forum Discussion
Vamsi_21
Occasional Contributor
2 years agoTTK failed reading from PHY slave
Hi , I have generated a design example using low latency ethernet 10g mac intel Arria 10 fpga ip design example user guide. The link to the design example is below:https://www.intel.com/content/www/...
- 2 years ago
Hi Vamsi,
I already sent the example design to your email and please check your email.
Best regards,
zying
ZiYing_Intel
Frequent Contributor
2 years agoHi Vamsi_21,
Can you check how many jtag service ports and what index number of desired port by "get_service_paths master" command in the system console?
This index number is used in the "hwtest/basic/basic.tcl".
Best regards,
zying