Forum Discussion

Vamsi_21's avatar
Vamsi_21
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
Solved

TTK failed reading from PHY slave

Hi , I have generated a design example using low latency ethernet 10g mac intel Arria 10 fpga ip design example user guide. The link to the design example is below:https://www.intel.com/content/www/...
Ethernet
  • ZiYing_Intel's avatar
    ZiYing_Intel
    2 years ago

    Hi Vamsi,


    I already sent the example design to your email and please check your email.


    Best regards,

    zying


ZiYing_Intel's avatar
ZiYing_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi Vamsi_21,


Can you try to move away from XCVR toolkit, create signaltap and monitor the TX and RX status to see if they are working fine. Just to isolate any Native PHY issue from XCVR toolkit.


Best regards,

zying


Vamsi_21's avatar
Vamsi_21
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Hi,
I have tried to view the tx and rx status signals by creating a signaltap file , but the signals are not being captured .
Below i have put a screenshot of the signaltap window.