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Altera_Forum
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14 years ago

TSE SGMII with Soft-CDR and Marvel 88E1111, receive clock

Hi guys, I am at a board design right now including a Stratix IV E FPGA and the Marvel 88E1111 phy. The SGMII pins of the phy are connected to the FPGA via true LVDS buffers. The 88E1111 has a ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Did you finished it yet? I have same phy and also a stratix IV but it wont work. I want to connect a MII interface with the tse/sgmii core.