Forum Discussion
Zarquin
Occasional Contributor
Occasional ContributorTSE GMII gmii_rx_dv without data_rx_valid signal
Dear Community, I am using the Triple Speed Ethernet IP Core with the GMII interface on a board with a Cyclone 10GX220. The TSE MAC command register was initialised with: 0x2033 (SW Reset, Pad E...
Wasn't a timing problem. It was a evaluation dialogue window problem:
community.intel.com/t5/FPGA-Intellectual-Property/Triple-Speed-Ethernet-MII-GMII-Timing-Issue/m-p/1531419#M28109
paveetirrasrie_Altera
Frequent Contributor
Frequent ContributorHi Zarquin,
Thanks for confirming.
I’m glad that your question has been addressed, I now transition this thread to community support.
If you have a new question, feel free to open a new thread to get the support from Intel experts.
Otherwise, the community users will continue to help you on this thread.
Thank you.
