Forum Discussion
Zarquin
Occasional Contributor
Occasional ContributorTSE GMII gmii_rx_dv without data_rx_valid signal
Dear Community, I am using the Triple Speed Ethernet IP Core with the GMII interface on a board with a Cyclone 10GX220. The TSE MAC command register was initialised with: 0x2033 (SW Reset, Pad E...
Wasn't a timing problem. It was a evaluation dialogue window problem:
community.intel.com/t5/FPGA-Intellectual-Property/Triple-Speed-Ethernet-MII-GMII-Timing-Issue/m-p/1531419#M28109
paveetirrasrie_Altera
Frequent Contributor
Frequent ContributorHi Zarquin,
I'm glad that you've found the rootcause.
I just want to confirm with the dialogue box, so if you closed the dialogue box, TSE IP doesn't work as intended?
Regards,
pavee
