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Honored Contributor
Honored ContributorTSE doesn't have data on RGMII output, functional simulation works fine (Max 10)
Hi everyone, We are using MAX 10 FPGA development kit that supports 10/100/1000 base-T Ethernet using an external Marvell 88E1111 PHY and Altera Triple-Speed Ethernet MegaCore MAC function. ...
Altera_ForumHonored Contributor
Honored ContributorHi Alex,
I assume the RGMII uses DDIO (Double Data rate I/O), and we cannot tap out DDIO by using SignalTap II. What we can do to ensure Tx activity is tapping out GMII signals (input signals of the DDIO) instead of RGMII signals.
