Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHello, hujianhua (http://www.alteraforum.com/forum/member.php?u=35796)
First of all I tryied to use TSE with InterNich tcp/ip stack (SSS example). And I found that tse_mac_init was called somewhere inside alt_iniche_init() and netmain(): I can see link, speed and other information in console, and all works fine. But I do not really need OS + tcp/ip stack using for some reasons. So I tryied to use TSE and SGDMA in the same way as you did. I unchecked the Aligned packet headers to 32-bit boundary and checked SGDMA's Allow unaligned transfers in SOPC builder. When I runned code you posted above, nothing happened. I tryied to use async and sync transmitt also... I didn't see any TSE output (trying to observe mdio_out signal of tse with SignaltapII). The only message in console was "Control register is ffff". Is it correct value? How can I configure command_config to enable send/receive of TSE?