Forum Discussion
New ContributorTriple Speed Ethernet IP - 1000BASE-X/SGMII PCS only - word alignment included?
I have tried this in hardware since I asked and the answer from Nathan above is incorrect. The 1000BASE-X/SGMII PCS only version of the tripe speed ethernet IP actually does word alignment internally. Word alignment on the tbi interface out of the rx serdes is NOT needed.
Also, the tse user guide actually states that in the port description:
"tbi_rx_d[9:0] - TBI receive data. This bus carries the data from the external SERDES. Synchronize the bus with tbi_rx_clk. The data can be arbitrary aligned."
Just wanted to update if anyone else is ever wondering about this.
New ContributorI have tried this in hardware since I asked and the answer from Nathan above is incorrect. The 1000BASE-X/SGMII PCS only version of the tripe speed ethernet IP actually does word alignment internally. Word alignment on the tbi interface out of the rx serdes is NOT needed.
Also, the tse user guide actually states that in the port description:
"tbi_rx_d[9:0] - TBI receive data. This bus carries the data from the external SERDES. Synchronize the bus with tbi_rx_clk. The data can be arbitrary aligned."
Just wanted to update if anyone else is ever wondering about this.
