Forum Discussion
anonimcs
Contributor
2 years agoTiming constraints of Intel IPs
Hi all, I have a design on Quartus 21.3 Pro and I noticed that the External Memory Interface IP for DDR4 memory has some timing violations within the IP core. I would expect that these kind of IP co...
RichardT_altera
Super Contributor
2 years agoYes, you need to post another new question. Then an agent will be assigned to your question based on your title first and then description.
Regards,
Richard Tan