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anonimcs's avatar
anonimcs
Icon for Contributor rankContributor
2 years ago

Timing constraints of Intel IPs

Hi all, I have a design on Quartus 21.3 Pro and I noticed that the External Memory Interface IP for DDR4 memory has some timing violations within the IP core. I would expect that these kind of IP co...
Memory
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

At Intel, we prefer a new case for each unique technical problem, as it aids our case analysis and helps us assess our customer support requirements. I understand this may cause some inconvenience, and I genuinely apologize for that. However, by starting a new discussion, you'll have a better chance of receiving the assistance you need from experts in the field.


If they require the design at any point, you can share this forum link with them, and they can approach me for the design.

Thank you for your understanding.


Regards,

Richard Tan


  • anonimcs's avatar
    anonimcs
    Icon for Contributor rankContributor
    2 years ago

    How can I request support from EMIF IP owners/experts in Intel ? What's the best way to do so ?