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RainGEHC's avatar
RainGEHC
Icon for New Contributor rankNew Contributor
3 years ago
Solved

The unused pins on EMIF bank can not work normally as GPIO

Hi, My environment: 10AS016E4F29, with Quartus pro 22.4. Today I met a problem. In my design, we used the DDR4 chip, the EMIF IP locates on bank 2J and 2K. and then I assigned some unused p...
  • RainGEHC's avatar
    RainGEHC
    3 years ago

    hi, FvM,

    thank you for the reply.

    yes, when I disable the EMIF, the pins can be driven normally. when I enable the EMIF, the pins can not be driven by logic.

    and i also found an Article with ID 000079165 from intel website, it mentioned that if HPS EMIF is enabled, Lane 3 of bank 2K can only be used as FPGA input only. I think this is the root cause.

    But the article also mentioned that the Quartus Prime software version 15.1.1 and earlier do not check for these restrictions, and the patch for above restriction is also scheduled to be added to a future version of the Quartus Prime software. I used Quartus pro 22.4, the newest, it seems this version still not check this rectriction.

    thanks again!

    Rain.

AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi Rain,


Thank you for your feedback.

I will reach out to Richard for the design.


Since you have got the answer in this case, I will transfer this case to community support.

If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.


Thank you.