Forum Discussion
BXia
Occasional Contributor
Occasional ContributorThe max output frequency of fPLL Intel Arria 10 FPGA IP
Hi,
We are using the fPLL Intel Arria 10 FPGA IP, the input reference clock is set to 100MHz, PLL output frequency is set to 2GHz, as shown in the attached screenshot.
However, we found the act...
Ash_R_Altera
Regular Contributor
Regular ContributorHi,
You are right.
The PLL max output frequency is limited by the VCO frequency which is 1.6GHz. Please refer the datasheet for IOPLL specifications:
Regards
BXiaOccasional Contributor
Occasional ContributorHi,
Thanks for your reply.
However, we are using fPLL, but not the IOPLL, we refer to Fractional PLL Specifications (attched image here), the max frequency is 14GHz.
Are the fPLL and IOPLL have the same specifications?
