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Vamsi_21's avatar
Vamsi_21
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

System console giving up when running the command "TEST_PHYSERIAL_LOOPBACK 0 1G 1000"

Hi, I have generated the design example for Low latency ethernet 10g mac intel fpga ip-- 10M/100M/1G/10G example design(Arria 10) by following the below document. https://www.intel.com/content/www/...
Ethernet
ZiYing_Intel's avatar
ZiYing_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi Vamsi_21,

Currently I don't have any update. I now transition this thread to community support. The community users will continue to help you on this thread.

Best regards,

zying

  • Vamsi_21's avatar
    Vamsi_21
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Hi,
    Is there any hardware_test_design avaialble for Low latency 100g Ethernet intel FPGA ip example design.
    I have generated an example design but it isn't working on the hardware , I am getting the below error:
    "TTK failed reading from PHY slave_10000, cannot enable TTK functionality for this PHY. Please verify the reconfig_clk is running and ensure this PHY is not stuck in reset."

    This error is same as the one i got for 10g ethernet design , so can you help me on this issue for the 100g design as well.