Forum Discussion
Vamsi_21
Occasional Contributor
2 years agoSystem console giving up when running the command "TEST_PHYSERIAL_LOOPBACK 0 1G 1000"
Hi, I have generated the design example for Low latency ethernet 10g mac intel fpga ip-- 10M/100M/1G/10G example design(Arria 10) by following the below document. https://www.intel.com/content/www/...
ZiYing_Intel
Frequent Contributor
2 years agoHi Vamsi_21,
Can we try connect the reconfiguration clock and reconfiguration reset ?
Best regards,
zying
Vamsi_21
Occasional Contributor
2 years agoHi, In the example design which i generated there is no reconfiguration clock and reconfiguration reset. Below i am sharing the screenshot of phy from RTL viewer.