Forum Discussion

Vamsi_21's avatar
Vamsi_21
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

System console giving up when running the command "TEST_PHYSERIAL_LOOPBACK 0 1G 1000"

Hi, I have generated the design example for Low latency ethernet 10g mac intel fpga ip-- 10M/100M/1G/10G example design(Arria 10) by following the below document. https://www.intel.com/content/www/...
Ethernet
ZiYing_Intel's avatar
ZiYing_Intel
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi Vamsi_21,


Please check whether the reconfiguration clock is available according to the prompt information, and check whether the reconfiguration interface is in reset.


Best regards,

zying


Vamsi_21's avatar
Vamsi_21
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Hi,
The design which i have generated is Low latency ethernet 10g mac intel fpga ip-- 10M/100M/1G/10G example design(Arria 10) by following the below document:
https://www.intel.com/content/www/us/en/docs/programmable/683063/19-1-19-1/10m-100m-1g-10g-ethernet-design-example.html


"In this design example i have generated , there is no reconfiguration clock and no reconfiguration reset."
Below iam attaching the screenshot of the phy block from RTL viewer.