Occasional Contributor
Frequent ContributorHi Vamsi_21,
For tranceiver phy, we don't use open service. You may refer link below https://community.intel.com/t5/FPGA-Wiki/Arria10-Transceiver-PHY-Basic-Design-Examples/ta-p/735196
There got a lot example designs inside the which may help you how to code in the system console.
Best regards,
zying
Occasional ContributorHi,
I have checked for different jtag clock frequencies (24MHz, 16 MHz, 6MHz) and the reconfig_clk is assigned properly
But in the system console iam still getting the below error
error:"TTK failed reading from PHY slave_2000, cannot enable TTK functionality for this PHY. Please verify the reconfig_clk is running and ensure this PHY is not stuck in reset."
