Altera_ForumHonored Contributor17 years agosynthesis of legacy ddr2 controllerCan I try the synthesis of legacy ddr2 controller. If yes, what changes I need to do in the generated core. Please reply
Recent Discussionsagilex 7 Platform Designer PIO addr widthDirect RF ipAgilex 7 R-Tile PIPE Direct Mode: Raw Rx Data Misalignment - Is Soft Word Alignment Needed?Avalon-MM Cyclone V Hard IP for PCI Express Intel FPGA IP Soft Reset and Hard ResetAgilex-7 MSI-X missing om AXI MCDMA for PCIe