Forum Discussion
XD3
New Contributor
3 years agoStratix10 Native XCVR IP and ATX PLL Reconfig Bus Hangs
Hello
We have errors accessing most reconfig registers on transceiver on the Transceiver.
We’re using Stratix10 1SGLU2F50 device, compiled with Quartus Prime Pro 21.2.
We have instantiated 1 A...
Kshitij_Intel
Frequent Contributor
3 years agoHi,
Can you please check have you enabled the options in the TX PLL and Native PHY IP mentioned in the below link.
https://www.intel.com/content/www/us/en/support/programmable/articles/000073968.html
Also, I am sharing a script please execute it and then try to read-write the registers.
Steps to execute that script.
Step 1: Goto system console file option.
Step2: Click on execute script and select the script. Click OK.
After that try to read-write the registers.
eg. % rd_channel $phy 0 0 0x144 1
Hope this will resolve your issue.
Thank you
Kshitij Goel