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Altera_Forum
Honored Contributor
10 years agoStratix V Native Phy
Hi all i'm working on "Transceiver Signal Integrity Development Kit" with strativ V GX. i'v already worked with 10Gbase-R Transceiver phy with no problem, and i tested my design with an Ethernet...
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Read through the Transceiver Toolkit notes I wrote near the top of this page:https://www.ovro.caltech.edu/~dwh/correlator/cobra_docs.htmlPerhaps there will be something that helps in there. Take a look at the Arria V GZ document too, that device uses the same PHY as the Stratix V.Cheers,Dave --- Quote End --- thanks dear Dave for your attentionunfortunately it couldn't help me in this issuei'm really confused, how can i solve the problemit doesn't seem so difficult, rx PMA would deserialize the data and parallel data on its output goes to input of tx PMA that serialize it again.i considered all of clock and pll correctly, and also defined timing constraint for it.but it doesn't worki need someone that has experience in PMA Direct mode.