Contributor
Regular ContributorHi Roee,
Sorry for being late, here is the finding from the discussion:
The error is valid and it relates to a limitation with sector-level clock gates and partitions. With distributed sector-level clock gating setting, you are physically creating a unique clock signal in each sector (although they functionally act the same). If a sector-level clock gate is connected to a partition, this can break partition port semantics since if that partition spans multiple sectors, multiple versions of the clock would need to be routed into the partition although the partition interface defines only a single clock port.
Possible workaround here include:
-Change the sector-gating type to Root Level. In this mode there is physically only one clock gate and so no issue with partition semantics.
-Connect the chip_id clock to inclk instead of outclk. It isn't obvious to me why the chip_id clock would benefit from being gated.
