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Prathyusha_Gandi's avatar
Prathyusha_Gandi
Icon for New Contributor rankNew Contributor
3 years ago

Stratix 10 GX 25G Ethernet Intel FPGA IP is not estabiling link with the NIC E810

Stratix 10 GX board has been connected to NIC E810 using QSFP and 25G Ethernet Intel FPGA IP example design is implemented on the board.

Board is programmed with the bit file but still the link is not established with the NIC, showing the status as DOWN.

What is the reason for the status being DOWN? How to establish the link?

3 Replies

  • paveetirrasrie_Altera's avatar
    paveetirrasrie_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi Prathyusha_Gandi,


    Apologize for the delay.

    I am still liaising with our engineering team on this issue and will let you know as soon as I have feedback.


    Regards,

    Pavee



  • paveetirrasrie_Altera's avatar
    paveetirrasrie_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    We do not receive any response from you to the previous question that I have provided. This thread will be transitioned to community support.

    If you have a new question, feel free to open a new thread to get the support from Intel experts.

    Otherwise, the community users will continue to help you on this thread.

    Thank you.