Forum Discussion
Occasional ContributorStratix 10 Calibration Native Phy and Atx Pll
Hi,
Q1. Can I use fpll as MCGB and dynamic reconfiguration it with profiles?
Ans - Yes.
Q2. Can I use fpll with mcgb and dynamic reconfiguration and atx pll with mcgb without dynamic reconfiguration. They goes to native phy serial clk 0 and 1. And I can mux them in native phy via reconfiguration interface.
Ans - It should be, please looked into the IP, If there are profiles in the dynamic reconfiguration tab, then profiles are supported.
Q3. Can i use fpll in Transceiver mode for 7GHz?
Ans - Maximum frequency for fPLL is 12.5Gbps (6250MHz).
Thank you
Kshitij Goel
Frequent ContributorHi Alex,
We should think about what calibration is actually doing. Essentially, we are tuning out “physical” silicon tolerance errors caused by manufacturing process variation, and selecting the correct VCO for the given data rate and REFCLK. Calibration is very much an analogue process that happens on the silicon device that can take milliseconds in some cases.
In contrast, when you simulate the calibration process, there is no silicon for this process to act upon. So I expect that we just mimic the calibration process taking place so that you can see it taking place. It would be incredibly time consuming if you had to simulate a transceiver for milliseconds before they could see the outcome of the dynamic reconfiguration and calibration process. For that reason, calibration in a simulation environment is kept conveniently short so users can focus on the important things like “is the transceiver is working properly after dynamic reconfiguration and calibration”.
Are you failing to meet a protocol spec?
Thank you
Kshitij Goel
Occasional ContributorYes, I failing to meet protocol specs.
I thought about another scheme to use TX PLLs and decided to use
One fpll in Transceiver mode with MCGB, with multiple profiles.
One ATX pll with also MCGB for higher speed, without reconfiguration. Mcgb because of need for 4 channels.
So fpll recalibration time meets time requirements.
And Native Phy with 2 tx pll inputs.
I read xcvr user guide and have some questions about 6.15 "unsupported features", can you explain about Reconfiguration MCGB and switching between two MCGB
- Petkov_Alex
