Forum Discussion

Petkov_Alex's avatar
Petkov_Alex
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

Stratix 10 Calibration Native Phy and Atx Pll

Hello. I have read document xcvr h/l tile stratix 10, and tested my project in ModelSim I have 4 channels native phy with multiple profiles saved and embedded reconfiguration streamer 2 Atx pll with...
  • Kshitij_Intel's avatar
    Kshitij_Intel
    3 years ago

    Hi,


    Q1. Can I use fpll as MCGB and dynamic reconfiguration it with profiles?

    Ans - Yes.


    Q2. Can I use fpll with mcgb and dynamic reconfiguration and atx pll with mcgb without dynamic reconfiguration. They goes to native phy serial clk 0 and 1. And I can mux them in native phy via reconfiguration interface.

    Ans - It should be, please looked into the IP, If there are profiles in the dynamic reconfiguration tab, then profiles are supported.


    Q3. Can i use fpll in Transceiver mode for 7GHz?

    Ans - Maximum frequency for fPLL is 12.5Gbps (6250MHz).


    Thank you

    Kshitij Goel


Kshitij_Intel's avatar
Kshitij_Intel
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi,


Please share the OPN.

Have you selected the correct configuration clock source(i.e. 125 MHz OSC_CLK_1 pin) in Device and Pin options?


Please refer the Calibration chapter in L- and H-Tile Transceiver PHY User Guide.


Also, the time required to complete the calibration process after device power-up can vary by device.


Thank you

Kshitij Goel