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HBhat2
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6 years ago

Stratix 10 - Native PHY - Hard PRBS Configuration

Hi, We are validating Stratix 10 SoC Dev kit with our custom FMC card @ 10G & 20G speed. We are using transceiver toolkit & the hard PRBS patterns to capture the eye. We got the polynomial info fro...
HBhat2's avatar
HBhat2
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6 years ago

Hi,

Thanks for your effort for consulting your factory.

Actually our debugging team has a set-up (with 33G digital oscilloscope) to validate the protocol specific eye opening and we are testing our custom FMC card with Stratix 10 SX dev kit.

The debugging set up also supports all the PRBS patterns as supported by Intel Stratix 10 Transceiver hard PRBS with same polynomial. However, debugging team observed some discrepancy and it is doubtful whether the received pattern is PRBS31 or not. Just to cross verify the received bit sequence in the oscilloscope , we want the seed value or the first 64-bit sequence.

With regards,

HPB

HBhat2's avatar
HBhat2
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6 years ago

Hi @cheepinc_Intel​ ,

Also, we observed that as soon as the transceiver channels are loaded in the Transceiver toolkit, TX lines are driven with default pattern. Also, if we click stop, then only RX side "checker" field will be pauses, but still the TX is line is continued to toggle.

I think the toolkit starts transmitting without user input, the START and STOP buttons related only to receiver to check the BER and other status.

Can you please clarify on this behavior?

With regards,

HPB