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Altera_Forum
Honored Contributor
13 years agoYep, I have.
I have gone as far as editing the _p0 and _pll0 .sv files in the Qsys-generated project, basically adding define ALTERA_ALT_MEM_IF_PHY_FAST_SIM_MODEL 0 And indeed the simulation says using regular PLL and EMIF instead of fast. But nevertheless, it seems like no actual calibration happens.