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FHint's avatar
FHint
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4 years ago
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Simulating the Generic Serial Flash Interface with ModelSim and Quartus 19.1

Hello, I'm trying to simulate a component that interacts with the Generic Serial FLash Interface Intel IP. I have created a small QSYS system that only contains a clock source BFM, a reset source B...
  • FHint's avatar
    FHint
    4 years ago

    I was able to simulate the flash by using the method explained in the linked article.

    It is necessary to create a wrapper for the flash simulation model, that your vendor will (hopefully) provide.
    In my case, the simulation model was only available in Verilog and the wrapper had to be in Verilog too, because of naming issues (VHDL doesn't allow for signals to end with an "_").

    My wrapper asmi_sim_model.v looks like this:

    `timescale 1ps/1ps
    
    module asmi_sim_model(
      input wire clk,
      input wire qspi_pins_dclk,
      input wire qspi_pins_ncs,
      inout wire [3:0] qspi_pins_data
      );
      
      // third party flash simulation module
      <name_of_your_flash_sim_model> device_model(
        .S(qspi_pins_ncs),
        .C_(qspi_pins_dclk),
        .HOLD_DQ3(qspi_pins_data[3]),
        .DQ0(qspi_pins_data[0]),
        .DQ1(qspi_pins_data[1]),
        .Vcc('d1800),
        .Vpp_W_DQ2(qspi_pins_data[2])
      );
        
    endmodule

    To instantiate the wrapper in my platform designer testbench I also had to create the corresponding _hw.tcl.

    The GSFI ASMI SPI interface has to be exported and connected to the asmi_sim_model wrapper. ENABLE_SIM_MODEL has to be deactivated.
    It was also necessary to link all the files the flash simulation model needs in the asmi_sim_model_hw.tcl.

    I hope this answer helps whoever struggles with the same problem.

    Best Regards,
    Florian