Forum Discussion

AKhan15's avatar
AKhan15
Icon for New Contributor rankNew Contributor
7 years ago

Simulating SCFIFO in modelsim

Hello, I am new to HDL and embedded systems in general so i apologise for asking a dumb question. I created the SCFIFO from the intel IP core. I only used the asynchronous clear, data, q, read and...
MuhammadAr_U_Intel's avatar
MuhammadAr_U_Intel
Icon for Contributor rankContributor
7 years ago

Hi,

your testbench seems correct. so possible issues are.

  1. library files are missing in simulation, it need to be added to vsim command.
  2. connections to fifo in the top level wrapper file is broken.

You can share some more details as @Vicky​ suggested for us to further take a look.

At same time take a look at the simple tutorial for setting up simulation with Native link setup (where all the simulation scripts are handled by quartus), hopefully you will be able to proceed.

https://www.youtube.com/watch?v=PmVVXQchv2c

Let us know if you have any questions.

Arslan