Yes, I have included the testbench, and set the settings before compilation.
I am able to follow the signals in simulation through the files, from asmi_parallel.vhd to the submodules asmi_parallel_asmi_parallel2_top_0.vhd, asmi_parallel_asmi_parallel2_top_0_asmi2_core.vhd and altera_asmi2_qspi_interface.sv to the altera_asmi2_qspi_interface_asmiblock.sv (all of them compiled and simulated fine).
In the altera_asmi2_qspi_interface_asmiblock.sv, the cyclonev_asmiblock then cannot be found by the ModelSim. I did include the library "altera", but there, the only thing I can find (humanly readable) is the cyclonev_asmiblock_info.xml, and the ports defined there do not match the ports defined in the altera_asmi2_qspi_interface_asmiblock.sv, the SPI signals spidatain, spisce, spidclk and spidataout are missing.