Forum Discussion
ALMSlinger
New Contributor
2 years agoSignaltap on dut|altpcie_a10_hip_pipen1b|test_out[319:0]
Hello, I am using pld_clk as signaltap clk to sample the test_out[319:0] signals of the pipe interface in Arria10GX HIP. But on the board the signaltap complains that pld_clk was not found. This h...
Wincent_Altera
Regular Contributor
2 years agoHi,
I am not sure if there is any special requirement on your current project.
But normally I will use use coreclkout_clk as the sample of signal.
But on the board the signaltap complains that pld_clk was not found.
>> can you please show me your signal tap printscreen ?
This happens even after the board enumerates successfully.
>> is it the ltssm able to link up ?
Regards,
Wincent_Intel