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Altera_Forum's avatar
Altera_Forum
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13 years ago

SGDMA write_waitrequest always 'high'

Hello everyone, In order to achieve my project, I have to use my Nios II in order to send data from my FPGA to a server. My FPGA will have to read data from a Dual port Onchip memory which is c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

If you have to debug further I would recommend simulating the design since you'll get to see everything that is happening in the system. Normally when I do DMA debug I have to look at the CPU issuing descriptors, DMA, memory, and streaming cores if present. It is often too much stuff to sample with signaltap so simulation is normally the way to go. Just make sure your Nios II code is minimial so that you don't have to wait long for the simulation to reach the point where the DMA starts running.