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Altera_Forum
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14 years ago

SGDMA write_waitrequest always 'high'

Hello everyone, In order to achieve my project, I have to use my Nios II in order to send data from my FPGA to a server. My FPGA will have to read data from a Dual port Onchip memory which is c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thank you BadOmen, I followed your advices and I changed my streaming core ^^'

I also started my SGDMA and fed it with a valid descriptor but I still get the "ready" to 0.

Even when I don't connect anything in the input of the SGDMA, the waitrequest is high and its ready signal is low.

I saw that you had a similar discussion with Socrate in the following thread:

http://alteraforums.org/forum/showthread.php?t=30273&page=2

My idea is to read the SGDMA ST data just like Socrate did but I don't get why my SGDMA is always waiting for an interruption that never happen because of the ready signal that is always low.

Do you think that I should try to change my Onchip Memory with an DDR3 RAM ? (the same thing that is done with the TSE exemple)