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Altera_Forum
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14 years ago

SGDMA write_waitrequest always 'high'

Hello everyone, In order to achieve my project, I have to use my Nios II in order to send data from my FPGA to a server. My FPGA will have to read data from a Dual port Onchip memory which is c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

waitrequest is an input to the master and since the master isn't writing data I wouldn't worry about it.

That block providing the streaming data doesn't appear to be following the ST spec. I see it asserting valid and streaming a short 3 beat packet and yet the SGDMA is not asserting ready so it will not buffer the data coming at it. This explains why the write signal doesn't assert, because it's not accepting the data from the streaming port to begin with.

Did you remember to start the SGDMA or feed it a valid descriptor? When it's idle I doubt it accepts streaming data.