Altera_ForumHonored Contributor13 years agoSGDMA write_waitrequest always 'high' Hello everyone, In order to achieve my project, I have to use my Nios II in order to send data from my FPGA to a server. My FPGA will have to read data from a Dual port Onchip memory which is c...Show Moremultiple-attachments.zip183 KB
Altera_ForumHonored Contributor13 years agoDoes anyone knows why ready signal of the SGDMA is always set to '0'? Thank you.
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