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RVanD5's avatar
RVanD5
Icon for New Contributor rankNew Contributor
3 years ago

SERDES IP not compiling after migrating to Quartus Pro 23.1

Hello, I am using LVDS SERDES IP on Arria 10 for RX DPA-FIFO which works on Quartus Prime17.1. The input data are all located on bank 3 and the reference clock comes from the output of an IOPLL. ...
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
3 years ago

It's definitely not possible without setting a "magic" option that disables the "no dedicated reference clock" error.

Provided you know the option, it's your responsibility to check that the design can work reliably under the given conditions, means data rate is clearly below maximum. E.g. Arria is specified to support 1250 to 1600 MBPS, depending on the speed grade, but your application uses 500 or 800 MBPS.