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RVanD5's avatar
RVanD5
Icon for New Contributor rankNew Contributor
3 years ago

SERDES IP not compiling after migrating to Quartus Pro 23.1

Hello, I am using LVDS SERDES IP on Arria 10 for RX DPA-FIFO which works on Quartus Prime17.1. The input data are all located on bank 3 and the reference clock comes from the output of an IOPLL. ...
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
3 years ago
Hello,
I can confirm that the option exists, but I don't feel legitimated to publish it in the official Intel forum. You can ask your Intel FAE for support, or try to locate the solution in internet forums.

Sorry that I can't help this way